Overview
An embedded control design needs a microcontroller that runs the loop and the interfaces, plus a way to add I/O and to manage the buses as the board grows. NXP provides the LPC microcontroller family and the I2C interface family that does both, and BeiLuo supplies them with genuine traceability and FAE support. This page shows how the MCU and the interface ICs fit together in an embedded control design.
The Microcontroller
The LPC family spans the entry-level Cortex-M0 and M0+ cores for a low-cost, low-power task and the mainstream Cortex-M3 and Cortex-M4 cores for a system that needs more memory and a richer peripheral set. A typical part includes on-chip flash and SRAM, timers and a PWM, a multi-channel ADC and a DAC, and interfaces such as SPI, I2C, I2S, UART, USB and CAN, and the larger parts add an Ethernet MAC. Choose the core from the workload and the memory from the code and the data, and reuse the code across the family with the MCUXpresso toolchain.
Speed and Memory
Estimate the cycles the loop needs at the worst case and the flash and the SRAM the firmware uses, then add headroom. The LPC1768 gives 512 KB of flash and 64 KB of SRAM, the LPC54606 gives 256 KB of flash and 136 KB of SRAM at 180 MHz, and the LPC11U68 gives 256 KB of flash on an efficient Cortex-M0+. Match the part to the task.
Adding I/O over I2C
A control panel needs more buttons, LEDs and control lines than a small host can drive directly, so an NXP I2C I/O expander adds the ports. The PCA9555 gives sixteen ports and the PCA9554 gives eight, both with a configuration register that makes each port an input or an output and an interrupt output that tells the host when an input changes. The address pins place several expanders on one bus, so the I/O grows in blocks without a larger host.
The Interrupt
The interrupt output saves the host from polling every port, which keeps the bus and the processor free for the real work. Connect the interrupt to a host input and service it in the firmware, and keep the debounce in mind for a mechanical button.
Managing the I2C Bus
As the bus grows, three problems appear: several devices share an address, the capacitance exceeds what the bus supports, and a fault or a hot-plug in one section disturbs the rest. An NXP PCA9548A 8-channel I2C switch answers all three, because it fans the upstream pair out to eight sections, isolates a section and even translates the voltage between the two sides. Write the control register to select a channel, and use the reset input to deselect all the channels at power-up.
Pull-ups and Capacitance
Keep the total bus capacitance within the limit, choose the pull-ups for the speed and the voltage, and use the switch to divide a large bus into sections. A clean bus is what makes the design reliable across the temperature range.
Verification
Validate the design on the bench by checking the clock, the power and the reset, by exercising the I2C expanders and the switch and by measuring the bus timing with a scope. Our FAE team can review the layout and the measurements and help you interpret them, so the design performs in the product as it does on the bench.
Getting Help
Send your control task, your peripheral and I/O needs and the environment to our FAE team, and we will propose an LPC MCU and the interface ICs, help choose the core and the ports and review the bus design. BeiLuo holds mainstream NXP devices in regional stock and ships them with an import declaration, a certificate of origin and a RoHS compliance file, so an embedded control design can move from prototype to production without a supply gap.